The development process of the carrier tape discrete components is very similar to that of passive components, first from jack type to surface mount type, and then miniaturization. From sot223 and sod87 to the current packaging forms such as sod723 and TSLP, they have higher requirements for anti-static in addition to the same requirements as the previous three points of passive components, because these are electrostatic sensitive components. In the past few decades, the packaging form has undergone great changes, from dip → SOIC, TSOP, QFP, PLCC → BGA, PGA → CSP → flip chip, cob or sip.

At the same time, the integration of IC is increasing. The packaged IC has changed from single chip to dual chip, and then to 3 and 4 chips

Both are constantly meeting the requirements of smaller package volume and more functions. It can be seen from table 1 that IC changes have higher and higher requirements for carrier tape.

Firstly, the reduction of feature size and the emergence of flipchip cob and sip packaging make the anti-static performance of tape carrier system more and more important;

Secondly, the process of flipchip cob requires that their carrier tape must meet the requirements of the purification workshop for size and high precision.

Of course, the scratch resistance of tape carrier material is also very important. Second, the materials of the carrier tape include two categories: paper and plastic. At present, the paper tape is only applied to passive components because of its thickness limitation and poor electrostatic protection and moisture-proof performance.